Doug Sparks, CTO, Hanking Electronics
Microelectromechanical systems (MEMS) are constantly affording ways to combine sensing, actuation, electronics and packaging into a single chip or subsystem. The pressure sensor is known to be one of the first silicon MEMS devices to be commercialised, made up of a silicon pressure sensor chip attached to a ceramic hybrid substrate. This technology evolved into a MEMS pressure sensor and integrated circuit (IC) two-chip solution in the 1980s, then Motorola combined the MEMS pressure sensor and bipolar complementary metal oxide semiconductor (CMOS) IC on a single silicon chip in the 1990s1. Analog Devices and Delphi later integrated MEMS inertial sensors and CMOS ICs, introducing wafer-level packaging (WLP) of the fragile MEMS structure2.
WLP methods protect the moving micromachine elements with a capping wafer, as shown in figure 1. When the CMOS wafer is sawn, a MEMS chip-scale package (CSP) is produced for a large grid array (LGA) package or printed circuit board (PCB). There are three basic approaches to MEMS and CMOS wafer integration.
Figure 1a shows the two-chip approach, which involves CMOS and MEMS wafers being manufactured separately in different wafer fabs. As already mentioned, WLP is used to protect the micromachine elements. The capping wafer has a cavity in which the micromachine is enclosed, but it has openings to allow for wire bonding later in the assembly process. The CMOS wafer is typically thinned after fabrication and then sawn. The thin CMOS wafer is placed on an LGA package or PCB, and the MEMS wafer is placed on top of the CMOS wafer. Wire bonding electrically links the MEMS and CMOS wafers as well as the underlying LGA or other package circuits. In some cases, the CMOS wafer is placed on top of the MEMS wafer and other package types such as dual in-line (DIL) and ball grid array (BGA) are used.
Figure 1b shows an alternative approach whereby the MEMS and CMOS wafers are produced together as one and a surface micromachine is fabricated on top of the resulting MEMS and CMOS wafer2. A capping wafer is bonded to the MEMS and CMOS wafer to protect the surface micromachine from particles, fluids and other causes of physical damage. Wire bonding is used to electrically connect the MEMS and CMOS wafer to an LGA package or PCB.
Figure 1c shows an approach adopted by companies such as InvenSense and MiraMEMS Sensing Technology that combines the MEMS and capping wafers3. This combined wafer is then bonded to the CMOS wafer using a eutectic or solder wafer bonding process to both electrically connect the wafers and seal the micromachine hermetically in a cavity. Figure 1c also illustrates how through-silicon vias (TSVs) can be used to form solder bumps on the CMOS wafer. TSVs also shrink the chip size, lowering costs. Avago Technologies and STMicroelectronics have incorporated TSVs in their MEMS CSPs. For consumer applications, the wafer stack—i.e. the combined MEMS and capping wafer and CMOS wafer—must be thinned by grinding. Final wafer thicknesses can range from 750 down to 50 μm, prior to LGA packaging. To keep up with the latest CMOS technologies, 200 mm and 300 mm diameter wafers with sub-90 nm dimensions are used in CMOS integrated wafer-level packages.
Figure 1
Wafer-level packaging (WLP) methods.
MEMS CSPs have shrunk over the last 15 years due to changing wafer bonding methods and materials. The first high-volume MEMS accelerometers and gyroscopes used full thickness wafers that were bonded together, most often using reflowed glass wafer-to-wafer bonding. The reflowed glass provided a hermetic seal that was electrically insulating; however, a wide sealing surface was required due to the spread of the glass during the hot wafer bonding step.
To shrink the sealing surface area and, in some cases, lower the wafer bonding temperature, metallic wafer-to-wafer bonding methods were developed. These methods borrowed metallurgies and processes developed for bumping and circuit board component attachment. Solder wafer bonding is generally used for lower temperature bonding where the grain structure of an electroplated or polycrystalline MEMS element would change at higher bond temperatures2. It is also used for infrared (IR) and optical sensors that have coatings that degrade at high temperatures. Gold-tin, gold-indium, copper-tin, aluminium-germanium and gold-silicon are common examples of eutectics or solders employed with MEMS wafer bonding.Transient liquid phase (TLP) eutectic bonding is a new trend in MEMS WLP. TLP uses one or more thin metal layers to form a low melting point eutectic seal during wafer bonding. The thin metal layer is totally consumed and its atoms interdiffuse into the barrier or adhesion metal films, meaning that the wafer stack, or CSP, can be heated above the low eutectic melting point without forming the original liquid alloy. This enables TLP wafers and chips to be exposed to higher processing or operational temperatures during assembly.
Caution must be taken with eutectics and solders to avoid Kirkendall voiding, which occurs when one type of metal atom has a faster diffusion coefficient than the opposing metal atoms in the adjoining bond layer. Brittle intermetallics may also form during multi-layer eutectic wafer bonding, especially when barrier and adhesion metal layers are involved. To even further minimise the sealing area and avoid intermetallics, a metal thermocompressive bond using gold-to-gold or copper-to-copper bonding has been employed by companies such as Intel and STMicroelectronics. Similar to 3D IC stacks, MEMS wafer bond stacks have increased from just two wafers to up to six wafers and employed combinations of different wafer bonding technologies for the same part4.
WLP of high Q resonators, such as gyroscopes, filters, oscillators and energy harvesters, has had problems with desorbed gas molecules in the microcavity. The water vapour and air molecules desorb from the wafer surfaces during the relatively high temperature (250–500⁰C) wafer bonding process and during higher operating temperatures in the field. To permanently trap the residual gas molecules, thin film getters or absorbents were developed and integrated into the WLP process flow5. These reactive layers are most often patterned on the capping wafer, as shown in figure 1a, and trap gas molecules during the 250–500⁰C wafer bonding process or subsequent post bond annealing. The use of thin film getters has enabled WLP of resonant gyroscopes. By adding a second cavity without a getter to the same MEMS chip, this method allows damped accelerometers to be integrated into the sensing device. Dual cavity CSPs are used in six degrees of freedom (6DoF) inertial measurement units (IMUs) that combine yaw, pitch and roll gyroscopes and linear accelerometers together in a single MEMS chip.
While many of the wafer-to-wafer bonding methods developed for silicon wafers can and have been applied to metal, III-V compound and glass wafers, some practical limitation exists when mixing wafers of different materials in the stack. Differences in the thermal expansion coefficients (TCEs) between wafers, even when relatively small, can result in bowing, cracking or built-in stress after a higher temperature wafer bonding step. Kovar (TCE of 5 to 6 ppm/⁰C) is often used with silicon (TCE 2.6 ppm/⁰C) as a hermetic package metal. However, anodically bonding Kovar wafers to borofloat glass (TCE 3 ppm/⁰C) wafers can result in wafer cracking across the wafer-to-wafer bond interface6, shearing off the majority of glass wafer, as shown in figure 2. Due to this thermomechanical stress and fracture, just a thin layer of glass is left, anodically bonded to the patterned metal wafer. The impact of poor fracture toughness of glass and silicon versus the high fracture toughness of metal is significant at the wafer level during packaging in terms of cracking and failure. Care must therefore be taken when selecting the wafer materials and bonding method for MEMS WLP integration.
Figure 2
Shear fracture of the glass wafer at the anodically bonded metal to glass wafer interface.
MEMS chip and microfluidic package integration can be a challenge. The traditional approach involves mounting a silicon MEMS chip on a metal fluidic header using epoxy, as shown on the left of figure 3. This MEMS device and a thin film getter are vacuum sealed using four wafers and involving three wafer-to-wafer bonding steps7. Next, metal resonating tubing is brazed to the metal subpackage. The silicon CSP is then epoxied to the metal subpackage to provide a fluid interface for the chemical analysis system. However, numerous problems are encountered in these types of assembled silicon MEMS microfluidic sensors. Silicon has low fracture toughness and can therefore break under high pressure. Furthermore, epoxy swells, softens and fails under high temperature and pressure or after chemical exposure over time, resulting in chip attachment loss.
Figure 3
Traditional silicon-based and 3D printed titanium MEMS chip and microfluidic package integration.
3D printing is proven to better integrate the MEMS chip and microfluidic package8, as shown on the bottom right of figure 3. The combined tubing and subpackage have been printed simultaneously in titanium, as has the capping wafer used to vacuum seal the device. 3D printed MEMS CSPs are corrosion-resistant, eliminating the need for epoxy die attach, and therefore offer a big improvement in reliability for aggressive microfluidics applications. They can be printed incorporating through-wafer vias (TWVs), cantilevers, suspended microtubes and curved horizontal and vertical surfaces simultaneously in one step, thus avoiding the assembly steps, epoxy and poor fracture toughness of traditional silicon-based MEMS CSPs.
In summary, MEMS WLP has been developed to integrate the MEMS micromachine and CMOS circuitry, thus reducing the size and thickness of the final CSP. MEMS and CMOS integration can be accomplished at the wafer level or through wafer-to-wafer bonding. Multiple wafer stacks have been employed for both MEMS and 3D ICs, mixing wafer bonding technologies for a single chip-scale package. The integration of the microfluidic MEMS chip and the package is often driven by silicon’s poor fracture toughness and the need for corrosion resistance. 3D printing has been applied to merging MEMS microfluidic sensors and a robust, weldable subpackage metal interface on a single chip.
Hanking Electronics
References
1Czarnocki, W. and Schuster, J. (1999). The evolution of automotive pressure sensors. Sensors, volume 16, issue 5, pp. 52–65.
2Sparks, D., Slaughter, D., Beni R., Jordan L., Chia M., Rich D., Johnson J. and Vas T. (1999). Chip-scale packaging of a gyroscope using wafer bonding. Sensors and Materials, volume 11, issue 4, pp.197–207.
3Nasari, S. and Flannery, A. (2008). Method of fabrication of Al/Ge bonding in a wafer packaging environment and a product produced therefrom. United States Patent and Trademark Office (USPTO) patent no. 7442570. Available at: https://bit.ly/3cjrOJf
4Mehra, A., Zhang, X., Ayon, A., Waitz, I., Schmidt, M. and Spadaccini, C. (2000). A six-wafer combustion system for a silicon micro gas turbine engine. Journal of Microelectromechanical Systems, volume 94, issue 4, pp.517–527.
5Sparks, D. (2010). Thin film getters: solid-state vacuum pumps for microsensors and actuators. Vacuum Technology & Coating, volume 11, issue 4, pp.44–49.
6Sparks, D. (2018). Metal-based wafer level and 3D-printed packaging. Chip-Scale Review, volume 22, issue 4, pp.14–17.
7Sparks, D., Smith, R., Massoud-Ansari, S. and Najafi, N., (2004). Coriolis mass flow, density and temperature sensing with a single vacuum sealed MEMS chip. Solid-State Sensors, Actuators and Microsystems Workshop, Hilton Head, South Carolina, US, June 6–10.
8Sparks, D. (2019). The advantages of using additive micromanufacturing in the fabrication of MEMS wafers and sensors. CMM, volume 12, issue 6, pp. 20–26.
Available at: https://bit.ly/2Vjv14A