Doug Sparks, president, M2N Technologies
Quantum computing has received a lot of attention lately owing to its potential to increase computing powers by orders of magnitude over that of conventional computing. Since quantum computing could revolutionise encryption, breaking into encrypted data, increasing memory density and dramatically boosting artificial intelligence, governments and corporations have been pouring billions into the field1.
Instead of using 0 and 1 binary bits, a quantum computer uses quantum bits, also called qubits, which are more probabilistic than conventional binary bits. Qubits use a quantum wave-like superposition of the bits. Quantum computers use wave interference effects and entanglement to manipulate the qubit to perform more operations or dramatically increase the memory capacity of a computer. There are two leading quantum computing technologies, namely cryogenic CMOS and ion trap.
Cryogenic CMOS quantum technology uses liquid helium to cool a silicon circuit chip down to 3 Kelvin and thus reduce thermal sources of error, then uses microwave bursts to drive the silicon qubit down to 20 milliKelvin2.
Ion trap quantum technology uses electromagnetically trapped ions to form the basic qubit cell. The quantum ion trap is contained in the micromachined cavity of a microoptoelectromechanical system (MOEMS) silicon-glass chip3. Quantum ion trap memory records the state of light in the atom or ion using the photon’s relative amplitude and phase. MOEMS chips incorporate a metal source that is heated to between 50 and 100°C to produce an ion vapour, and this, in turn, offers a relatively narrow infrared (IR) spectrum of states for quantum data storage.
The electronic numerical integrator and computer (ENIAC), the first programmable, general-purpose digital computer, was developed in 1945 and required a room large enough to accommodate its 17,000 vacuum tubes, 70,000 resistors, 10,000 capacitors, 6,000 switches and 1,500 relays. Today, people expect a device to have significantly more processing power and memory, whilst being small enough to comfortably travel on the wrist or in the pocket. This will also be the case with quantum computing devices. Cryogenic CMOS is therefore not a favourable option, since liquid helium cooling requires devices to be considerably larger and bulkier, features incompatible with mobile devices. Moreover, for the consumer, it is far more difficult to implement liquid helium cooling than metal ion source chip-scale quantum devices.
MOEMS chips, operating at room temperature, offer a more familiar integration path to the ubiquitous implementation of quantum computing and associated advances in mobile, perhaps personal, artificial intelligence (AI).
The ion trap quantum computer is a derivative of the atomic clock. Caesium (Cs) atomic clocks were first made using glass tubes with Cs vapour, which are stimulated with a rubidium (Rb) discharge lamp. As the IR light travels through the glass tube, it is modulated by an oscillator and then illuminates a photodetector. When the oscillator reaches the frequency between two electron spin transition levels in the Cs atom, optical absorption reduces the output at the photodetector. A feedback loop is used to keep the oscillator at the correct frequency used by the atomic clock.
In the early 2000s, DARPA funded development programs to create a much smaller microelectromechanical system- (MEMS-) based version of the Cs atomic clock4. Wafer-to-wafer bonding produced the cavity to hold the Cs vapour. A vertical cavity surface emitting laser was then placed under the MOEMS chip, with its beam radiating upward into the MOEMS Cs capsule stacked above it.
Ion trap quantum computers leverage silicon and glass chip-scale packaging methods and micromachining processes. Wafer-to-wafer bonding in an ultra-high vacuum (UHV) bonding system is used to contain the ion in both the atomic clock and quantum computer. Anodic, eutectic and thermocompression bonding have been used in quantum ion traps. Glass wafers are used to provide an optically transparent window into the quantum ion trap for both the laser and photodetector interface. Patterned metal runners, vias and feedthroughs are employed as electrostatic electrodes, mirrors, getters and heaters. Magneto-optical or electrostatic-optical trapping is employed to store and retrieve quantum data in ion vapour MOEMS devices. Wet and plasma etching of both silicon and glass wafers have been used to form the ion cavity and channels in the chip by a variety of researchers. Other chips, with lasers, photodetectors and circuits, are needed to form a working device.
All quantum computers are plagued by a variety of micro defects and external interferences, and these cause signal noise, resulting in computing errors. Since quantum ion traps deal with the manipulation of subatomic energy levels in an ion or atom, a variety of environmental factors such as temperature and electromagnetic fields can lead to quantum decoherence and loss of data. Ultra-high vacuum packaging is required to prevent random gas molecules from colliding with the ion used in the qubit. Anodic bonding of glass to silicon has been used in many MEMS devices, including atomic clocks and quantum ion traps. Anodic bonding is well known to generate oxygen from glass during the bond process. Residual oxygen molecules in the quantum ion trap cavity after anodic bonding could oxidise the metal vapour source material or generate unwanted photons during laser stimulation of the qubit. MEMS devices such as resonant gyroscopes, oscillators and filters have faced this vacuum packaging problem for decades. Trapped gases, desorbed molecules and leaks can all lower the quality factor (Q) of MEMS resonators. The decades of vacuum packaging MEMS development have been applied to quantum computers5. Advanced wafer bonding, pre- and post-bond baking, thin-film getters and sealing materials are all being used to reduce this source of quantum interference in qubits.
The long-term hermeticity of quantum ion traps is also an issue. Helium is known to penetrate most wafer-level seals, including anodic bonded glass to silicon6. Just the 5 ppm of helium found in our atmosphere has penetrated chemical vapour deposition (CVD) vacuum-sealed MEMS oscillator chips at 100°C. The argon used to sputter metal films can become implanted into the metal surface and the implanted argon atoms will gradually out gas over the life of a MEMS resonator to degrade Q. For quantum ion traps, these spurious gas molecules can produce wavelength emissions that interfere with device performance.
As mentioned previously, quantum ion traps, often aptly referred to as optical quantum vapour cells, require the heating of the metal ion source. Metals such as caesium (Cs), calcium (Ca), barium (Ba), beryllium (Be), rubidium (Rb) and yttrium (Y) are typically heated to around 100°C to volatise a small amount of them. The chip must also keep the overall temperature of the quantum ion trap constant to avoid thermal fluctuation errors. Placing the MOEMS chip on a micromachined thermal and mechanical vibration isolation membrane improves thermal and mechanical vibration isolation. This method has already been used to enhance the performance of inertial sensors and timing oscillators over a wide temperature operating range.
Moreover, incorporating micromachined thin-film heating elements in the MOEMS chip, as shown in figure 1, or on the platform enables vapour formation and enhances qubit stability, thus improving the performance of the quantum chiplet stack. Heating of the vapour sources and perhaps the getter inside the microcavity periodically requires good thermal coefficient of expansion (TCE) matching between the electrical feedthroughs and wafer material. Using through-wafer vias (TWVs) makes the implementation of a quantum chiplet stack simpler. Employing through-glass vias (TGVs) could result in thermo-mechanical cracking of the glass around the via and a reliability issue. A variety of thermal design and material considerations must be made for MOEMS chips.
Figure 1: A cross-sectional view of an electro-optical, micromachined ion vapor trap chip being used in quantum devices.
Electro-static and -magnetic fields are used to manipulate the electron states in ions in quantum MOEMS chips. On-chip metal electrodes can be incorporated into the MOEMS chip for electrostatic ion control as can ferromagnetic films. External electro-static and -magnetic fields can obviously impact these sensitive devices. Unintentional, external electromagnetic fields can cause a shift in electron levels in neutral atoms or ions, leading to a quantum decoherence error in the qubit. Integrated circuits (ICs) and MEMS devices have used Faraday cage packaging approaches to shield semiconductor devices from electric fields.
In nickel- (Ni-) based MEMS resonator gyroscope packages, incorporating Mu-metal shielding, as shown in figure 2, prevents interference from external electromagnetic fields due to nickel’s ferromagnetic properties. Mu-metal is a soft ferromagnetic, nickel-iron (Ni-Fe) alloy with high permeability, used for shielding sensitive electronic equipment against static or low-frequency external electromagnetic fields. The same packaging approach can be employed in quantum ion trap devices to reduce this source of computational or qubit storage error.
Figure 2: Examples of Faraday shielding and Mu-metal magnetic shielding incorporated into existing printed circuit boards (PCBs) and microelectromechanical system (MEMS) sensors.
The quantum chiplet stack approach to packaging employed to manufacture a more stable MOEMS-based quantum device is shown in figure 3. The signal processing IC, photo detector chip, MOEMS chip and semiconductor laser are stacked one on top of the other on the thermo-mechanical isolation platform. The performance of the quantum chiplet stack is improved by incorporating the Mu-metal electromagnetic shielding shown in figure 2, which can double as a Faraday cage against external electric fields. The constant chip temperature can be maintained by passing current through thin-film polysilicon (poly-Si) or tungsten (W) heating elements on the isolation platform or MOEMS chip.
Figure 3: A cross-sectional diagram of a quantum chiplet stack, packaged with thermal and mechanical isolation and electromagnetic shielding elements.
Future improvement in the understanding of the ion or atom trapping process and cavity design may allow for the use of a wider range of ions, atoms and molecules. For widespread mobile quantum chiplet stack device applications, power consumption will eventually become critical. There will be a push to lower the cavity temperature needed to generate the atomic vapour. Lower vapour pressure metals such as cadmium (Cd), selenium (Se), phosphorus (P), sulphur (S) and zinc (Zn) are one possible development path. Perhaps higher atomic mass noble gases such as krypton (Kr), radon (Rn) and xenon (Xe) could be employed.
Damped MEMS devices such as accelerometers and radio frequency (RF) switches already backfill the wafer bonder with gases such as argon (Ar) prior to bonding. The resultant, low-pressure, argon- (Ar) filled MEMS cavity does an exceptional job of dampening cantilevers without corroding metal runners and contacts. Thin-film getters are used in noble gas-filled MEMS cavities to capture any trapped oxygen or water vapour. It is possible that volatile molecules can be utilised for low-temperature quantum devices, although these molecules may be adsorbed by the cavity sidewalls. Surface capture of a noble gas on the cavity sidewalls is not a significant issue. Thermal heating elements and isolation will still be required to maintain a constant temperature, but the power requirement would be lower for a noble gas filled cavity in future quantum MOEMS chips.
Like microfluidic glass medical devices, quantum ion trap arrays have been fabricated with up to 20 quantum ion traps made on a single glass MOEMS chip. This is part of a push to demonstrate the memory expandability and/or error reducing redundancy of this chip design and fabrication technique. It is similar to how the more conventional semiconductor memory chips expanded, starting in the 1970s, with a few Kbits of memory increasing up to current Gbits of memory capability today. Both the quantum energy level superposition and the physical quantum ion trap density per chip can increase in the future, offering a Quantum Moore’s Law of memory growth. Using a proven MEMS technology that can operate at room temperature and a packaging technique that incorporates traditional thermal isolation and electromagnetic shielding will make quantum computing more widely available than competing cryogenic CMOS technology. Like inertial, timing and filter MEMS chips, MOEMS quantum chiplet stacks might find their way into a broad spectrum of devices, bringing improved data encryption, increased memory and enhanced AI.
Doug Sparks
M2N Technologies
References1Gibney, E. (2019) Quantum gold rush: the private funding pouring into quantum start-ups. Nature, volume 574, issue 7776, pp. 22–24.Available at: bit.ly/3r09lOx
2Xue, X., Patra, B., van Dijk, J.P.G. et al. (2021) CMOS-based cryogenic control of silicon quantum circuits. Nature, volume 574, issue 7776, pp. 205–210.Available at: bit.ly/433NRNU
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